Low Loss Design of Flyback Power Supply with Integrated Switch

1) Preface

This paper introduces how to design the circuit to reduce the no-load and standby losses in the flyback power supply using iris40xx series integrated switches. To achieve this goal, a circuit that converts the working mode of iris device according to the load condition can be used. Quasi resonant mode (QR) is used under heavy load, and pulse ratio control mode (PRC) is used under light load and no load. When switching to PRC mode under light load and no-load conditions, the circuit will operate in the frequency range of 15-20KHz, so that the no-load loss will be reduced from a typical 2.5W (230VAC input) to about 0.8W. Under no-load condition, the quasi resonant mode will make the circuit work at the frequency of 300-350khz, which will lead to high switching loss.

2) Working process of standby circuit

The circuit in Figure 1 is a typical single output flyback power supply using iris40xx integrated switching devices. The circuit is different from other application guides. It adds a circuit that can reduce the operating power consumption under no-load and standby conditions. The additional circuit includes Q1 / R12 / R13 / C11 / D8. These five devices form a switching circuit to control the passing or cutting off of the quasi resonant feedback signal from the auxiliary winding B to the feedback end of iris40xx.

Figure 1) typical power circuit design with standby circuit

The working process of this standby circuit is quite simple, which will be explained here. D3 / R5 / C4 / D4 constitute a delay circuit, which feeds back the quasi resonant information from the auxiliary winding to the feedback pin, so that iris40xx can detect that all energy has been transmitted from the primary side to the secondary side, and the drain voltage has dropped to the lowest point for soft switching. Q1 is arranged to make a switch on this path to make the feedback signal effective or invalid, and effectively change the working mode of iris 40xx from quasi resonant mode (when the feedback is effective) to low-frequency pulse ratio control mode (when the feedback is invalid).

The circuit determines the switching time between the two modes by monitoring the voltage of the auxiliary winding. Under normal load, the auxiliary winding voltage is high, and the mode switching circuit is set at an appropriate level, so that Q1 is opened under this condition, and the QR feedback signal / delay circuit is effective. When the circuit drops to no-load or light load conditions, the auxiliary winding voltage drops below the set level, making the feedback / delay circuit invalid.

R12 / R13 / D8 constitute a voltage divider, which is used to set the switching voltage level of the standby mode switching circuit. This switching voltage level is determined by the voltage drop on R13 and D8. When the voltage of the auxiliary winding is high enough, the current flows through D3 / R12 / R13 and D8. This reduces the voltage to R12 and the voltage between the emitter and base of PNP tube Q1. When the voltage exceeds 0.6V, the current is injected into the emitter junction of Q1, and Q1 will be turned on. If the voltage on the auxiliary winding is low, so that little or no current passes through R12, so that the voltage drop on R12 (followed by the voltage drop between emitter and base of Q1) is lower than 0.6V, the emitter base junction of Q1 does not have enough forward bias, so Q1 cannot be turned on, making the feedback delay signal invalid.

3) Design steps

Let's use an example to illustrate how to design and implement this part of the circuit. We assume that the other circuits have been set according to other design guidelines.

First, let's take an example. The VCC of normal design is 17V. If the rectifier on the auxiliary winding uses devices such as 1N4148, the voltage of the auxiliary winding shall be designed as 18V.

Thus, under normal load conditions, the voltage at point X in the energy transmission cycle is 18V. Now we want to select a voltage value at point x to switch the working mode. This is obviously lower than 18V, so we should choose a voltage value several volts lower than the expected bias voltage to ensure that it can be switched under light load, but can also start to enter QR mode under full load. Let's choose 15V (because the feedback current from the output control circuit is large, the voltage of the auxiliary winding under light load or no-load will be reduced).

If we get 15V at point x, the voltage of the emitter (point y) of Q1 will be 1V lower than it. This is because the forward voltage drop V of D3 exists, so point y will be 14V. When the voltage between emitter base junctions is 0.6V, Q1 will turn on. So let's set R12 to 620 ohms. When 968 µ current passes through R12, Q1 will turn on. In this way, if we want Q1 to turn on when the Y point is 14V, we can set the voltage stabilizing value of d8 and calculate the resistance value of R13:

In this example, if V is 14V, I is 968 µ and D8 is 11V, R13 will be 2.4k.

In this way, the circuit will be able to switch the operating mode to low-power standby mode by using load change, and the load range is greater than 1a to 0.05A or less.

4) Circuit waveform

The waveform of Fig. 2 shows the case where the load change causes the circuit to switch from quasi resonant operation mode to PRC mode.

As shown in CH4, when the load current drops from full load to no load, the feedback voltage level will increase due to the increase of output voltage to transfer the stored energy. Under this condition, the feedback voltage level finally increases to a certain point and the FET stops switching, as shown in the section with flat drain waveform on ch1. At the same time, QR signal can not be seen at FB pin (CH3). The VCC voltage (CH2) also decreases because the auxiliary winding does not provide energy at this time. After about 5 milliseconds, the feedback level stabilizes and the FET starts switching again. However, at this time, the circuit works in PRC mode, because VCC decreases and there is no QR signal at FB end, the reduced voltage can be seen on CH3. When operating under this condition, the feedback level is still high due to no-load output, so the circuit only needs to transfer little energy from the primary side to the auxiliary winding and output winding to maintain the balance of the circuit until the next load change.

Fig. 2) waveform when the circuit is switched from QR mode to PRC mode

Drain (ch1) / VCC (CH2) / FB (CH3) and load current (CH4)

5) Optional external forcing circuit

Fig. 3 shows how to use an external forcing signal to make the circuit enter the PRC working mode. Q2 can drive the MOSFET with a logic level, so that the driving signal can be directly given by the microprocessor or other signal sources. The circuit works very simply. Q2 is usually closed to make the circuit work normally. The mode is determined by the load current. When Q2 is turned on, point W is pulled to the ground to short circuit the QR signal and prevent it from being sent to the FB pin, so that the circuit will naturally turn to the PRC mode.

Fig. 3) as a part of iris PSU circuit, Q2 becomes a forced circuit

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