Can Two Solar Panels with Different Currents Be Connected in Series into 12V

Two solar panels with different currents can be connected in series into 12V, but this is neither reasonable nor cost-effective, and the parallel efficiency is much higher. Let's make an analysis with examples below:

If there are two 6V battery boards with currents of 10a and 6A respectively, the voltage after series connection is exactly 12V. However, the total current will be near 6a, making the original 60W 36W into 12vx6a = 72W, and 30% of the power is lost in vain. This is obviously a 1 1 "2 scheme, and it is also easy to cause the 6A battery panel to heat.

The best connection scheme should be parallel. Maybe the subject will say that the parallel voltage is too low to meet the load demand. In fact, there is the same problem in series.

Because the solar panel is a very special battery, the output of the solar panel will experience the rise and fall changes like a roller coaster from sunrise to sunset, and the time to normally drive the load in a day is very short. Therefore, the battery power storage mode will be used to work. It is also impossible for the sharp rise and fall of electric voltage to be directly used for charging. A DC-DC voltage stabilizing module must be equipped to work normally. If the efficiency of this circuit is 80%, plus the series loss of the front battery board, the total efficiency is only 57.6%.

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Board From Introduction to Mastery Series (6)
Due to the updated development tools, it is necessary to repeat the previous content in this blog. Today, we first demonstrate how to use vivado to develop pure logic engineering, that is, only on pl. Just recently, I was watching Lei silei's "startling the core step by step - internal design analysis of soft core processor", so I moved some experiments to zed board for verification. Children's shoes interested in openrisc can follow rill's column to further obtain learning resources.First, it briefly introduces the openrisc software development, and refers to the steps of establishing the development environment in Lei silei's book.1. Download the GNU development environment. You can directly download the configured VirtualBox image. The link is ftp://openrisc.opencores.org/virtualbox-image/ , the FTP user name and password are openrisc. Download version 2011-12-15.2. Download and install VirtualBox. Create a new virtual machine, configure it as Linux, Ubuntu, 512MB memory (not high demand), and use the existing virtual hard disk (openrisc_ubuntu_2011-12-15. VDI)Once the installation is complete, it can be started. The GNU tool chain is or32 elf -... (it can be ar, as, G , GCC, etc.). Root password: openriscSet the shared folders of windows and virtual machines in VirtualBox. Close the Ubuntu system, select "Settings" in the VirtualBox main interface, and add the windows shared folder e: share in the "data space", which is named share in Ubuntu. After setting, start the Ubuntu system, and enter the command sudo mount - t vboxsf share / MNT / sharefolder in the terminalThe virtual machine is running as shown in the figure (if the figure is too large to see completely, you can right-click to save it as a picture and view it locally).3. Write simple test assembly code example. S# Comments like this# Begin.secTIon .text, "ax".org 0x100.global _ start_ start:l.andi r0,r0,0l.extwz r1,r0l.extwz r2,r0l.addi r1,r1,0x0Al.add r2,r2,r1l.nop 0x0001# EndfourCompile: or32 elf as example. S - O example. OLink: or32 elf LD - t ram.ld example.o - O example.or32The link input script ram.ld is as follows:MEMORYram : ORIGIN = 0x00000000, LENGTH = 0x00005000SECTIONS.text :*(.text) > ram.data :*(.data) > ram.bss :*(.bss) > ramENTRY (_start)Or1ksim simulator running: sim - t example.or32 - m1m > example.traceThe generated trace file example.trace is as follows:Seeding random generator with value 0x88a2d16eOr1ksim 2011-08-15Building automata... done, num uncovered: 0/213.Parsing operands data... done.ResetTIng PIC.loadcode: filename example.or32 startaddr=00000000 virtphy_ transl=00000000Not COFF file formatELF type: 0x0002ELF machine: 0x005cELF version: 0x00000001ELF sec = 5SecTIon: .text, vaddr: 0x00000000, paddr: 0x0 offset: 0x00002000, size: 0x00000118S 00000100: a4000000 l.andi r0,r0,0 r0 = 00000000 flag: 0S 00000104: e020004d l.extwz r1,r0 r1 = 00000000 flag: 0S 00000108: e040004d l.extwz r2,r0 r2 = 00000000 flag: 0S 0000010c: 9c21000a l.addi r1,r1,0xa r1 = 0000000a flag: 0S 00000110: e0420800 l.add r2,r2,r1 r2 = 0000000a flag: 0exit(0)@reset : cycles 0, insn #0@exit : cycles 5, insn #6diff : cycles 5, insn #6From the above results, we can see the results of software simulation. Pay attention to the changes of R1 and R2 values, which will be seen in the later hardware simulation.Export binary file: or32 elf objcopy - O binary example.or32 mem.binPlease refer to the original book for the specific meaning of the above steps and command line parameters, which will not be mentioned here.In order to convert the mem.bin file into a format recognized by vivado simulator, the blogger has written a format conversion program bin2mem. M with MATLAB, and the code is as follows:clear;clc;close all;fid = fopen('mem.bin','rb');mem = fread(fid,'uint8');fclose(fid);mem = reshape(mem,4,[]);mem = [65536*256,65536,256,1]*mem;fid = fopen('mem.data','w');fprintf(fid,'%08x',mem);fclose(fid);After getting mem.data, it declares the end of openrisc software development. Next, use vivado to develop the hardware platform.First, get vivado 2013.2 software, which can be downloaded from Xilinx official website. The latest version of the blogger has not been used. It can not guarantee that all operation steps are consistent. Readers need to coordinate by themselves.After installation, run vivado and double-click the icon below. IDE is on the left and HLS is on the right. Only IDE is used in this experiment.The welcome interface after startup is as followsSelect create new project and set the project name as followsPress step until after the following screen
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Board From Introduction to Mastery Series (6)
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